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Optimizing FPGA-based accelerator design for deep convolutional neural networks

Published in Proceedings of the 2015 ACM/SIGDA international symposium on field-programmable gate arrays, 2015

This paper is about the number 3. The number 4 is left for future work.

Recommended citation: Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong; Proceedings of the 2015 ACM/SIGDA international symposium on field-programmable gate arrays (2015). https://zhacmsra.github.io/files/2015-FPGA.pdf

talks

未名·芯论坛(第十二期)

Published:

3月9日下午15时,由北京大学集成电路学院、集成电路高精尖创新中心、北京大学国家集成电路产教融合创新平台、集成电路科学与未来技术北京实验室、后摩尔时代微纳电子学科创新引智基地、北京大学校友会半导体分会联合主办的“未名·芯”论坛之青年学者系列讲座第十二期在线上线下成功同步举办。本期邀请到阿里巴巴平头哥高级技术专家张宸博士为大家带来主题为“Breaking through AI system’s bottleneck, a chip architecture perspective”的报告。讲座由集成电路学院研究员孙广宇主持,线上线下共计40余人参加。

后摩尔时代的任督二脉:系统壁垒与算力瓶颈

Published:

主要内容:随着摩尔定律的停滞和唐纳德定律的失效,仅靠工艺进步早已无法满足新型应用对处理器算力的需求。“算法-系统-架构-电路”通盘完整的设计优化成为下一代处理器性能增长的新动力。

teaching

Teaching experience 2

Workshop, University 1, Department, 2015

This is a description of a teaching experience. You can use markdown like any other post.

General Suggestions

general, Shanghai Jiao Tong University, EECS, 2024

This is a description of a teaching experience. You can use markdown like any other post.