Chen Zhang (张宸)

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Architect (高级技术专家),
DAMO Academy, Alibaba Group
Work email: mingchong.zc [at] alibaba-inc [dot] com
Work email: (deprecated)
Personal email: email

Find me at  linkedin google scholar dplp pku pku microsoft github


[2021.03 ~ Now ] Architect (高级技术专家), DAMO Academy, Alibaba

[2017.08 ~ 2021.02] Senior Researcher, Microsoft Research Asia


[2012.09 ~ 2017.07] Ph.D., Computer Architecture, Peking University

[2015.09 ~ 2016.09] Visiting Scholar, Computer Architecture, University of California, Los Angeles

[2008.09 ~ 2012.07] Bachelor, Micro-electronics, University of Electronic Science and Techinology of China

About Me

I received my PhD degree from CECA (Center for Energy-efficient Computing and Applications), Peking University in 2017, co-advised by Prof. Jason Cong and Prof. Guangyu Sun. I majored in domain-specific architecture design for deep learning applications. I continued my research in MSRA (Microsoft Research Aisa) after graduation and joint DAMO Academy at Alibaba Group afterwards. I have published 13 papers and received ~2500 citations. I have been selected as one of the 18 winners from the mainland China in the "World's top 2% Scientists 2020" in the area of "Computer hardware and architecture". Before that, I received my B.E. in Micro-electronics from University of Electronic and Science Technology of China in 2012.

Research Interests

I am broadly interested in computer architecture and software-hardware co-design. I have been specially focused on deep learning acceleration, energy-efficient and high performance computing systems. I have published ~10 papers including FPGA, ISCA, CVPR, AAAI, TCAD, etc.


  • 2021   World's 2% Scientists 2020 (Ranked 14 in 18 mentioned researchers from Mainland China).

  • 2020   Honorable mention of most influential scholars in AI chip 2000 (35-th in total citation, 4-th as first author).

  • 2020   Featured people at MSRA.

  • 2020   Special Stock Award, Microsoft Research Asia.

  • 2019   Donald O. Pederson Best Paper Award, news reported by IEEE CEDA, PKU, and UCLA.

  • 2015   Best Paper Nomination, FPGA 2015.